Electronic Design Automation
- Clock network synthesis
- Resonant clock synthesis
- Adjustable Delay Buffer (ADB) insertion algorithm
- Reliable and Variation-aware design
- Clock tree generation with noise minimization
- Power gating-aware HLS and logic design
Click here for full list of topics.
Participants: Deokjin Joo, Joohan Kim, Youngchan Kim, Heechun Park, Hyoungseok Moon, Juyeon Kim, Seyong Ahn, Jongsung Kang, Jeongwoo Heo, Dongyoun Yi, Byungmin Ahn
- C. E. Stroud, L.-T. Wang, and Y.-W. Chang, "Introduction," in Electronic Design Automation: Synthesis, Verification, and Testing (L.T. Wang, Y.-W. Chang, and K.-T. Cheng, Editors), Elsevier/Morgan Kaufmann, 2009.
- Placement and routing results are performed by Synopsys IC Compiler. Input benchmark circuit is b15 in ITC99
Clock networks: In synchronous digital circuits, all memory elements, which are called flip-flops (FFs), sample their input data at the rising (or falling) edge of clock signal. The circuits that distribute this signal are called clock networks. The figure on the right hand side is an illustration of a clock tree, which is a kind of clock network. It can be seen in the figure that the clock tree distributes the clock signal to ALL clock sinks (FFs) in the system.
- The clock signal must keep switching when the system is powered on, as all FFs depend on it. This makes clock trees one of the most active circuits on a chip.
- It is desirable that the clock trees deliver clock signals with minimum clock signal arrival time differences for enabling high-speed operation of a chip.
- The difference of the latest and the earliest clock signal arrival time is called clock skew.
Clock tree generation with noise minimization: While it is desirable for clock trees to have minimum clock skew as possible, this means that the clock buffers that amplify the clock signal (shown as triangles in the figures) switch simultaneously, which generates Simultaneous Switching Noise (SSN). This can cause delay variations in the circuits which may cause a chip to fail. To mitigate this problem, clock polarity assignment technique can be used. To assign polarity to a clock tree means to have some part of the clock tree have opposite phase clock signal (figure on the left). By replacing clock buffers to inverters, and replacing the affected flip-flops to opposite edge triggered ones, simultaneous switching problem is mitigated. This is due to the fact that buffers and inverters generate noise at different edge of the clock signal (figure on the right). However, mixing inverters in clock network induces clock skew. We solved the problem by proposing a method that trade-off clock skew and SSN.
Resonant clock synthesis: Excessive switching activities of clock network consume large dynamic power of an electronic system. Especially, due to large amount of wire resources, the power consumption of the clock mesh structure (which is an alternative clock network to clock trees) is not acceptable. Resonant clocking technique uses LC resonance to store energy on an inductor as magnetic energy and use it (the rightmost figure). We minimized the number of allocated LC tanks under clock skew bound.
Adjustable Delay Buffer Insertion: In multiple power mode design, the supply voltage of a system varies depending on modes so clock arrival time on clock sinks also changes dynamically. Adjustable delay buffer (ADB) is used to control delay for multiple power modes. However, the large area/control overhead of ADB makes the ADB insertion problem harder. We proposed algorithms that optimize the number of allocated ADB under clock skew bound.
Power gating-aware HLS and logic design: In power gating technology which removes leakage, the three important design parameters are the wakeup current (from sleep to active mode transition time), the amount of current flowing to ground when the sleep transistors are turned on, and the sleep transistor overhead. Note that reducing the wakeup time affects the overall performance of the circuit, and reducing the peak current flowing to ground when the sleep transistors are turned on mitigates the noise on the power distributed network. Furthermore, reducing the number of sleep transistors saves the design area and also reduces the design complexity. Clearly, there are trade offs between the number of sleep transistors used, the peak current flowing to ground, and the transition time from sleep to active mode. We optimized the number of sleep transistors by developing several clustering algorithms (figure on the left side). Efficient clustering algorithm reduces the wakeup time while satisfying peak current constraints (graph on the right side).
- Image quality improvement
- Low power image generation for OLED
- Object classification
- Fast processing time
- Improve or keep image quality
- Image quality assessment
Participants: Hyoungjun Jeon, Kiyoung Kim
Even though image processing can be thought as a mature area, it still has many issues arising from its specific applications.
- Some applications such as video filters require fast processing time
- Different displays require different image processing techniques for the optimal view to the users
- Exploit human perception of image to reduce overall brightness without the user noticing for power reduction
- Object recognition and classification, in conjunction with machine learning.
- (a): input image and its edge
- (b), (c): blue boxes are high edge-ratio parts -> apply exemplar-based inpainting
- (d): result of exemplar-based inpainting
- (e): a red box is low edge-ratio part -> apply diffusion-based inpainting
- (f): result
Image inpainting: In some images, there are missing, damaged, or unwanted regions. The process of filling these regions called imaged inpainting. This is one of the most important research areas in the field of image processing. It has various applications such as image restoration, unwanted object removal, loss concealment, etc.
- Diffusion-based method is appropriate for smooth images. This method is fast, but it degrades the quality of texture dominating images, for example, it shows blur effect. Also, it is not effective for large missing region.
- Exemplar-based method is appropriate for texture intensive images and large missing region. This method preserve textures, but it is time consuming.
- Hybrid method combines two method to overcome the blur effect of diffusion-based method and the long processing time of exemplar-based method.
Comparison of the images produced by the conventional histogram equalization methods HE , BBHE , BPDFHE , PCCE, NMHE , and our proposed methods HE-g and HE-gc.
-  C. Guillemot and P. Le Meur, Digital image processing, Pearson Education India, 2009.
-  Y. T. Kim, “Contrast enhancement using brightness preserving bi-histogram equalization,” IEEE Transactions on Consumer Electronics, 43(1), pp. 1–8, Oct. 1997.
-  D. Sheet, H. Graud, A. Suveer, M. Mahadevappa, and J. Chatterjce, “Brightness preserving dynamic fuzzy histogram equalization,” IEEE Transactions on Consumer Electronics, 57(4), pp. 2475–2480, Nov. 2010.
-  C. Lee, C. Lee, Y. Y. Lee, and C. S. Kim, “Power-constrained contrast enhancement for emissive displays,” IEEE Transactions on Image Processing, 21(1), pp. 80–93, Jan. 2012.
-  S. Poddar, S. Tewary, D. Sharma, V. Karar, A. Ghosh, and S. K. Pal, “Non-parametric modified histogram equalization for contrast enhancement,” IET image Processing, 7(7), pp. 641–652, Oct. 2013.
Histogram equalization: In image processing, histogram equalization (HE) is a popular method to enhance the image quality and contrast by transforming input pixel intensities into output pixel intensities to make the histogram of the output image as uniform as possible. Due to its simplicity and effectiveness, HE is widely used in various applications, including digital photography, radar and medical images.
The basic idea of using histogram equalization is to stretch the range of gray-levels in input image to enhance the image quality and contrast. However, this straight use of histogram equalization may change the original brightness of an input image, and produce annoying artifacts, or deteriorate visual quality. To preserve the mean brightness while enhancing visual quality, many researchers have employed a divide-and-conquer approach. The main difference among the existing divide-and-conquer based histogram equalizations is how they partition the input histogram.
However, we proposed a novel graph based approach where we can control how the light intensity values shift (HE-g, HE-gc). With the new graph based approach, it is possible to prevent visual artifacts and deterioration of image quality by describing relative relationship between pixel values.
- (a) Example histogram of an image
- (b) Magnification of histograms in the range of gray levels between 10 and 50
- (c) Gray level remapping for low power image
- (d) Original image, power = 1
- (e) Image by our LP-local with D = 0.98, power = 0.95
- (f) Image by our LP-local with D = 0.96, power = 0.88
- (g) Image by our LP-local with D = 0.94, power = 0.85
Low Power Image: OLED (organic light-emitting diode) display gains a special attention recently due to the merits of relatively high contrast, fast response time, and high energy efficiency. However, OLED display requires to overcome several important issues such as uniformity, degradation of brightness, and power consumption. In particular, minimizing power consumption becomes an utmost concern in designing mobile devices and TVs. With image processing, it is possible to make image darker to save power without the viewer noticing by exploiting human perception of color.
Object classification: Image classification problem is the problem of identifying and classifying an input image to a previously defined class. Bag of Words model is one approach of achieving such task. First, in the training phase, image features is extracted from training images. Features are numerical information from images. Second, features common to each class are identified. These set of features (words) form a bag for later use in classification. Lastly, when an unknown image is given, features are extracted and the occurrences of the "words" are examined and compared to previously created "bags". The similarity is computed and classification is made.
Large scale data processing/analysis
Click here for full list of topics.
Participants: Hyoungjun Jeon, Jeongwoo Heo, Jungwoo Choi, Kyeongrok Jo
The major problems in big data processing include predictive modeling, descriptive modeling and pattern discovery. Complex analyses are required to solve these problems, such as classification, cluster analysis and frequent pattern mining. These analyses require many algorithms behind them:
- Frequent counting
- Graph complement
- Addition/Deletion of vertex/edge
- Depth first search/Breadth first search
- Distance table
- Analytic array
- Entropy measure
- EM algorithm
- MDL principle
- Moments of distribution
- Cosine similarity
- Data summary
- The large volume of data only allows partial analysis, even for high performance data systems
- The data cluster may shift over time, due to trend evolution